[PPC-VLE] Fix(ppc/il): Treat r0 as a register in e_addi/e_add16i IL #7517
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chedahub
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Pull Request Overview
This PR fixes incorrect Intermediate Language (IL) generation for PowerPC VLE's e_addi and e_add16i instructions by removing the OTI_GPR0_ZERO flag, which was causing register r0 to be incorrectly treated as constant zero instead of as a register operand.
- Removed
OTI_GPR0_ZEROflag fromoperToILcall foroper1parameter - Register
r0is now correctly treated as a general-purpose register for data-flow analysis - Updated IL generation to use default options instead of forcing zero-constant interpretation
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Thanks for the PR! This should be fixed in 5.2.8512 |
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Description
This PR updates the Intermediate Language (IL) generation for the e_addi and e_add16i instructions on the PowerPC VLE architecture to ensure correct data-flow analysis.
Motivation and Context
For
e_addiande_add16iinstructions, the IL was incorrectly interpreting ther0register as a constant0instead of a register source. This was caused by theOTI_GPR0_ZEROflag.Changes Made
The
OTI_GPR0_ZEROflag has been removed.As a result,
r0is now correctly treated as a general-purpose register in the IL, enabling accurate data-flow analysis.operToIL(il, oper1, OTI_GPR0_ZERO, ...)operToIL(il, oper1)This ensures that r0 is consistently treated as a register operand in the IL for these instruction.
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